Version: V1.0 | Release Date: 2023-11-01 |
R130C | ||
---|---|---|
Vendor ID | 451 (0x01c3) | ![]() |
Vendor Name | Banner Engineering Corporation | |
Vendor Text | More Sensors. More Solutions. | |
Vendor URL | www.bannerengineering.com/io-link | |
Device ID | 659475 (0x0a1013) | |
DeviceFamily | R130C Series | |
Features | ||
Block Parameter | yes | |
Data Storage | yes | |
Profile Characteristic | 0x4000 (Common Application Profile: Identification and Diagnosis) | |
Supported Access Locks | Parameter: yes, Data Storage: yes, Local Parameterization: yes, Local User Interface: yes | |
Communication | ||
IO-Link Revision | V1.1 | |
Transmission Rate | 38400 bit/s (COM2) | |
Minimum Cycle Time | 3.3 ms | |
SIO Mode Supported | yes | |
M-Sequence Capability | PREOPERATE = TYPE_0 with 1 octet on-request data OPERATE = TYPE_2_6 with 1 octet on-request data ISDU supported | |
Device Variant | R130C-8P22-KQ | |
Description | PNP to IO-Link converter | |
Product ID | R130C-8P22-KQ | |
Device Icon | ![]() | |
Device Symbol | ![]() | |
Connection Type | M12-4 connector | |
- pin 1 | brown; L+ | |
- pin 2 | white; Other | |
- pin 3 | (light) blue; L- | |
- pin 4 | black; C/Q |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 8 | Boolean | false = Inactive, true = Active | Port1 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
2 | 9 | Boolean | false = Inactive, true = Active | Port1 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
3 | 10 | Boolean | false = Inactive, true = Active | Port2 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
4 | 11 | Boolean | false = Inactive, true = Active | Port2 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
5 | 12 | Boolean | false = Inactive, true = Active | Port3 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
6 | 13 | Boolean | false = Inactive, true = Active | Port3 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
7 | 14 | Boolean | false = Inactive, true = Active | Port4 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
8 | 15 | Boolean | false = Inactive, true = Active | Port4 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
9 | 0 | Boolean | false = Inactive, true = Active | Port5 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
10 | 1 | Boolean | false = Inactive, true = Active | Port5 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
11 | 2 | Boolean | false = Inactive, true = Active | Port6 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
12 | 3 | Boolean | false = Inactive, true = Active | Port6 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
13 | 4 | Boolean | false = Inactive, true = Active | Port7 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
14 | 5 | Boolean | false = Inactive, true = Active | Port7 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
15 | 6 | Boolean | false = Inactive, true = Active | Port8 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
16 | 7 | Boolean | false = Inactive, true = Active | Port8 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input |
bit offset | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
subindex | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
bit offset | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
subindex | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 8 | Boolean | false = Off, true = On | Port1 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
2 | 9 | Boolean | false = Off, true = On | Port1 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
3 | 10 | Boolean | false = Off, true = On | Port2 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
4 | 11 | Boolean | false = Off, true = On | Port2 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
5 | 12 | Boolean | false = Off, true = On | Port3 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
6 | 13 | Boolean | false = Off, true = On | Port3 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
7 | 14 | Boolean | false = Off, true = On | Port4 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
8 | 15 | Boolean | false = Off, true = On | Port4 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
9 | 0 | Boolean | false = Off, true = On | Port5 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
10 | 1 | Boolean | false = Off, true = On | Port5 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
11 | 2 | Boolean | false = Off, true = On | Port6 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
12 | 3 | Boolean | false = Off, true = On | Port6 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
13 | 4 | Boolean | false = Off, true = On | Port7 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
14 | 5 | Boolean | false = Off, true = On | Port7 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
15 | 6 | Boolean | false = Off, true = On | Port8 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
16 | 7 | Boolean | false = Off, true = On | Port8 Discrete2 Output State | true (1) = Discrete2 Output Active |
bit offset | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
subindex | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
bit offset | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
subindex | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 8 | Boolean | false = Inactive, true = Active | Port1 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
2 | 9 | Boolean | false = Inactive, true = Active | Port2 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
3 | 10 | Boolean | false = Inactive, true = Active | Port3 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
4 | 11 | Boolean | false = Inactive, true = Active | Port4 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
5 | 12 | Boolean | false = Inactive, true = Active | Port5 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
6 | 13 | Boolean | false = Inactive, true = Active | Port6 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
7 | 14 | Boolean | false = Inactive, true = Active | Port7 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
8 | 15 | Boolean | false = Inactive, true = Active | Port8 Discrete1 Input State | true (1) = Discrete1 Input Active. Note - even if Discrete1 is configured as an output, the active state will be reflected at the input | ||||
9 | 0 | Boolean | false = Inactive, true = Active | Port1 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
10 | 1 | Boolean | false = Inactive, true = Active | Port2 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
11 | 2 | Boolean | false = Inactive, true = Active | Port3 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
12 | 3 | Boolean | false = Inactive, true = Active | Port4 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
13 | 4 | Boolean | false = Inactive, true = Active | Port5 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
14 | 5 | Boolean | false = Inactive, true = Active | Port6 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
15 | 6 | Boolean | false = Inactive, true = Active | Port7 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input | ||||
16 | 7 | Boolean | false = Inactive, true = Active | Port8 Discrete2 Input State | true (1) = Discrete2 Input Active. Note - even if Discrete2 is configured as an output, the active state will be reflected at the input |
bit offset | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
subindex | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
bit offset | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
subindex | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 8 | Boolean | false = Off, true = On | Port1 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
2 | 9 | Boolean | false = Off, true = On | Port2 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
3 | 10 | Boolean | false = Off, true = On | Port3 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
4 | 11 | Boolean | false = Off, true = On | Port4 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
5 | 12 | Boolean | false = Off, true = On | Port5 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
6 | 13 | Boolean | false = Off, true = On | Port6 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
7 | 14 | Boolean | false = Off, true = On | Port7 Discrete1 Output State | true (1) = Discrete1 Output Active | ||||
8 | 15 | Boolean | false = Off, true = On | Port8 Discrete1 Output State | true (1) = Discrete2 Output Active | ||||
9 | 0 | Boolean | false = Off, true = On | Port1 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
10 | 1 | Boolean | false = Off, true = On | Port2 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
11 | 2 | Boolean | false = Off, true = On | Port3 Discrete2 Output State | true (1) = Discrete1 Output Active | ||||
12 | 3 | Boolean | false = Off, true = On | Port4 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
13 | 4 | Boolean | false = Off, true = On | Port5 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
14 | 5 | Boolean | false = Off, true = On | Port6 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
15 | 6 | Boolean | false = Off, true = On | Port7 Discrete2 Output State | true (1) = Discrete2 Output Active | ||||
16 | 7 | Boolean | false = Off, true = On | Port8 Discrete2 Output State | true (1) = Discrete2 Output Active |
bit offset | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
subindex | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
bit offset | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
subindex | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 120 | 8-bit UInteger | ro | Reserved | |||||
2 | 112 | 8-bit UInteger | ro | Master Cycle Time | Communication: Current communication cycle duration used by the master. This value defines the process data cycle. | ||||
3 | 104 | 8-bit UInteger | ro | Min Cycle Time | Communication: Minimum communication cycle duration supported by the device. This value defines the lowest possible process data cycle. | ||||
4 | 96 | 8-bit UInteger | ro | M-Sequence Capability | Communication: Information on the structure and the supported features of the communication messages. | ||||
5 | 88 | 8-bit UInteger | 17 | ro | IO-Link Revision ID | Communication: Identifier for the currently used communication protocol revision. | |||
6 | 80 | 8-bit UInteger | ro | Process Data Input Length | Communication: Information on width and features of the process input data (Process Data from Device to Master). | ||||
7 | 72 | 8-bit UInteger | ro | Process Data Output Length | Communication: Information on width of the process output data (Process Data from Master to Device). | ||||
8 | 64 | 8-bit UInteger | ro | Vendor ID 1 | Identification: Highest octet of the Vendor ID. Combined with the parameter Vendor ID 2, this parameter defines the 16-bit value of the unique Vendor ID as assigned by the IO-Link Community. | ||||
9 | 56 | 8-bit UInteger | ro | Vendor ID 2 | Identification: Lowest octet of the Vendor ID. Combined with the parameter Vendor ID 1, this parameter defines the 16-bit value of the unique Vendor ID as assigned by the IO-Link Community. | ||||
10 | 48 | 8-bit UInteger | ro | Device ID 1 | Identification: Highest octet of the Device ID. Combined with the parameters Device ID 2 and 3, this parameter defines the 24-bit value of the vendor-specific Device ID. | ||||
11 | 40 | 8-bit UInteger | ro | Device ID 2 | Identification: Middle octet of the Device ID. Combined with the parameters Device ID 1 and 3, this parameter defines the 24-bit value of the vendor-specific Device ID. | ||||
12 | 32 | 8-bit UInteger | ro | Device ID 3 | Identification: Lowest octet of the Device ID. Combined with the parameters Device ID 1 and 2, this parameter defines the 24-bit value of the vendor-specific Device ID. | ||||
13 | 24 | 8-bit UInteger | ro | Reserved | |||||
14 | 16 | 8-bit UInteger | ro | Reserved | |||||
15 | 8 | 8-bit UInteger | ro | Reserved | |||||
16 | 0 | 8-bit UInteger | wo | X | System Command | Application: Command interface for devices without ISDU support. Validity and execution of commands are not confirmed. |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
subindex | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 120 | 8-bit UInteger | Device-specific Parameter 1 | ||||||
2 | 112 | 8-bit UInteger | Device-specific Parameter 2 | ||||||
3 | 104 | 8-bit UInteger | Device-specific Parameter 3 | ||||||
4 | 96 | 8-bit UInteger | Device-specific Parameter 4 | ||||||
5 | 88 | 8-bit UInteger | Device-specific Parameter 5 | ||||||
6 | 80 | 8-bit UInteger | Device-specific Parameter 6 | ||||||
7 | 72 | 8-bit UInteger | Device-specific Parameter 7 | ||||||
8 | 64 | 8-bit UInteger | Device-specific Parameter 8 | ||||||
9 | 56 | 8-bit UInteger | Device-specific Parameter 9 | ||||||
10 | 48 | 8-bit UInteger | Device-specific Parameter 10 | ||||||
11 | 40 | 8-bit UInteger | Device-specific Parameter 11 | ||||||
12 | 32 | 8-bit UInteger | Device-specific Parameter 12 | ||||||
13 | 24 | 8-bit UInteger | Device-specific Parameter 13 | ||||||
14 | 16 | 8-bit UInteger | Device-specific Parameter 14 | ||||||
15 | 8 | 8-bit UInteger | Device-specific Parameter 15 | ||||||
16 | 0 | 8-bit UInteger | Device-specific Parameter 16 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
subindex | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 0 | |||||||
bit offset | 7 - 0 | |||||||
element bit | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | Boolean | false = Unlocked, true = Locked | Parameter Write Access | This lock prevents the write access to all read/write parameters of the device except for the parameter 'Device Access Locks'. | ||||
2 | 1 | Boolean | false = Unlocked, true = Locked | Data Storage | This lock prevents the write access to the device parameters via the data storage mechanism. | ||||
3 | 2 | Boolean | false = Unlocked, true = Locked | Local Parameterization | This lock prevents the device settings from being changed via local operating elements on the device. | ||||
4 | 3 | Boolean | false = Unlocked, true = Locked | Local User Interface | This lock prevents the access to the device settings and display via a local user interface. The user interface is disabled. |
bit offset | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
subindex | / / / / / / | / / / / / / | / / / / / / | / / / / / / | / / / / / / | / / / / / / | / / / / / / | / / / / / / |
bit offset | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
subindex | / / / / / / | / / / / / / | / / / / / / | / / / / / / | 4 | 3 | 2 | 1 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 0 | |||||||
bit offset | 7 - 0 | |||||||
element bit | 7 - 0 |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 |
subindex | 1 | 1 | 1 | 2 | 2 | 2 | 3 | 3 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 |
subindex | 3 | 4 | 4 | 4 | 5 | 5 | 5 | 6 |
octet | 16 | 17 | ||||||
bit offset | 15 - 8 | 7 - 0 | ||||||
subindex | 6 | 6 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 32-bit Integer | 0..2147483647 | Run counter | Run counter |
octet | 0 | 1 | 2 | 3 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 1 | 1 | 1 | 1 | ||||
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 32-bit Integer | 0..2147483647 | Run counter | Run counter |
octet | 0 | 1 | 2 | 3 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 1 | 1 | 1 | 1 | ||||
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 0 = Group by Port, 1 = Group by Channel | 0 | Process Data Grouping | Configure grouping of process data. |
octet | 0 | |||||||
bit offset | 7 - 0 | |||||||
subindex | 1 | |||||||
element bit | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 32-bit Integer | 0..2147483647 | 0 | Event Time | Event indicating the corresponding configured running time has elapsed. |
octet | 0 | 1 | 2 | 3 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 1 | 1 | 1 | 1 | ||||
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 32-bit Integer | 0..2147483647 | 0 | Event Time | Running time when an event will be raised indicating that service is required. Set to 0 to disable raising event. |
octet | 0 | 1 | 2 | 3 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 1 | 1 | 1 | 1 | ||||
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 32-bit Integer | Port1 Discrete1 Count | ||||||
2 | 32 | 32-bit Integer | Port1 Discrete1 Duration | ||||||
3 | 64 | 32-bit Integer | Port1 Discrete1 Events Per Minute | ||||||
4 | 96 | 32-bit Integer | Port1 Discrete1 Totalizer Counter | ||||||
5 | 128 | 32-bit Integer | Port1 Discrete2 Count | ||||||
6 | 160 | 32-bit Integer | Port1 Discrete2 Duration | ||||||
7 | 192 | 32-bit Integer | Port1 Discrete2 Events Per Minute | ||||||
8 | 224 | 32-bit Integer | Port1 Discrete2 Totalizer Counter | ||||||
9 | 256 | 32-bit Integer | Port2 Discrete1 Count | ||||||
10 | 288 | 32-bit Integer | Port2 Discrete1 Duration | ||||||
11 | 320 | 32-bit Integer | Port2 Discrete1 Events Per Minute | ||||||
12 | 352 | 32-bit Integer | Port2 Discrete1 Totalizer Counter | ||||||
13 | 384 | 32-bit Integer | Port2 Discrete2 Count | ||||||
14 | 416 | 32-bit Integer | Port2 Discrete2 Duration | ||||||
15 | 448 | 32-bit Integer | Port2 Discrete2 Events Per Minute | ||||||
16 | 480 | 32-bit Integer | Port2 Discrete2 Totalizer Counter | ||||||
17 | 512 | 32-bit Integer | Port3 Discrete1 Count | ||||||
18 | 544 | 32-bit Integer | Port3 Discrete1 Duration | ||||||
19 | 576 | 32-bit Integer | Port3 Discrete1 Events Per Minute | ||||||
20 | 608 | 32-bit Integer | Port3 Discrete1 Totalizer Counter | ||||||
21 | 640 | 32-bit Integer | Port3 Discrete2 Count | ||||||
22 | 672 | 32-bit Integer | Port3 Discrete2 Duration | ||||||
23 | 704 | 32-bit Integer | Port3 Discrete2 Events Per Minute | ||||||
24 | 736 | 32-bit Integer | Port3 Discrete2 Totalizer Counter | ||||||
25 | 768 | 32-bit Integer | Port4 Discrete1 Count | ||||||
26 | 800 | 32-bit Integer | Port4 Discrete1 Duration | ||||||
27 | 832 | 32-bit Integer | Port4 Discrete1 Events Per Minute | ||||||
28 | 864 | 32-bit Integer | Port4 Discrete1 Totalizer Counter | ||||||
29 | 896 | 32-bit Integer | Port4 Discrete2 Count | ||||||
30 | 928 | 32-bit Integer | Port4 Discrete2 Duration | ||||||
31 | 960 | 32-bit Integer | Port4 Discrete2 Events Per Minute | ||||||
32 | 992 | 32-bit Integer | Port4 Discrete2 Totalizer Counter |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 1023 - 1016 | 1015 - 1008 | 1007 - 1000 | 999 - 992 | 991 - 984 | 983 - 976 | 975 - 968 | 967 - 960 |
subindex | 32 | 32 | 32 | 32 | 31 | 31 | 31 | 31 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 959 - 952 | 951 - 944 | 943 - 936 | 935 - 928 | 927 - 920 | 919 - 912 | 911 - 904 | 903 - 896 |
subindex | 30 | 30 | 30 | 30 | 29 | 29 | 29 | 29 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 895 - 888 | 887 - 880 | 879 - 872 | 871 - 864 | 863 - 856 | 855 - 848 | 847 - 840 | 839 - 832 |
subindex | 28 | 28 | 28 | 28 | 27 | 27 | 27 | 27 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 831 - 824 | 823 - 816 | 815 - 808 | 807 - 800 | 799 - 792 | 791 - 784 | 783 - 776 | 775 - 768 |
subindex | 26 | 26 | 26 | 26 | 25 | 25 | 25 | 25 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 767 - 760 | 759 - 752 | 751 - 744 | 743 - 736 | 735 - 728 | 727 - 720 | 719 - 712 | 711 - 704 |
subindex | 24 | 24 | 24 | 24 | 23 | 23 | 23 | 23 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 703 - 696 | 695 - 688 | 687 - 680 | 679 - 672 | 671 - 664 | 663 - 656 | 655 - 648 | 647 - 640 |
subindex | 22 | 22 | 22 | 22 | 21 | 21 | 21 | 21 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 639 - 632 | 631 - 624 | 623 - 616 | 615 - 608 | 607 - 600 | 599 - 592 | 591 - 584 | 583 - 576 |
subindex | 20 | 20 | 20 | 20 | 19 | 19 | 19 | 19 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 575 - 568 | 567 - 560 | 559 - 552 | 551 - 544 | 543 - 536 | 535 - 528 | 527 - 520 | 519 - 512 |
subindex | 18 | 18 | 18 | 18 | 17 | 17 | 17 | 17 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
subindex | 16 | 16 | 16 | 16 | 15 | 15 | 15 | 15 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
subindex | 14 | 14 | 14 | 14 | 13 | 13 | 13 | 13 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
subindex | 12 | 12 | 12 | 12 | 11 | 11 | 11 | 11 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
subindex | 10 | 10 | 10 | 10 | 9 | 9 | 9 | 9 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 96 | 97 | 98 | 99 | 100 | 101 | 102 | 103 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
subindex | 8 | 8 | 8 | 8 | 7 | 7 | 7 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 104 | 105 | 106 | 107 | 108 | 109 | 110 | 111 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
subindex | 6 | 6 | 6 | 6 | 5 | 5 | 5 | 5 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
subindex | 4 | 4 | 4 | 4 | 3 | 3 | 3 | 3 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | 2 | 2 | 2 | 2 | 1 | 1 | 1 | 1 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 32-bit Integer | Port5 Discrete1 Count | ||||||
2 | 32 | 32-bit Integer | Port5 Discrete1 Duration | ||||||
3 | 64 | 32-bit Integer | Port5 Discrete1 Events Per Minute | ||||||
4 | 96 | 32-bit Integer | Port5 Discrete1 Totalizer Counter | ||||||
5 | 128 | 32-bit Integer | Port5 Discrete2 Count | ||||||
6 | 160 | 32-bit Integer | Port5 Discrete2 Duration | ||||||
7 | 192 | 32-bit Integer | Port5 Discrete2 Events Per Minute | ||||||
8 | 224 | 32-bit Integer | Port5 Discrete2 Totalizer Counter | ||||||
9 | 256 | 32-bit Integer | Port6 Discrete1 Count | ||||||
10 | 288 | 32-bit Integer | Port6 Discrete1 Duration | ||||||
11 | 320 | 32-bit Integer | Port6 Discrete1 Events Per Minute | ||||||
12 | 352 | 32-bit Integer | Port6 Discrete1 Totalizer Counter | ||||||
13 | 384 | 32-bit Integer | Port6 Discrete2 Count | ||||||
14 | 416 | 32-bit Integer | Port6 Discrete2 Duration | ||||||
15 | 448 | 32-bit Integer | Port6 Discrete2 Events Per Minute | ||||||
16 | 480 | 32-bit Integer | Port6 Discrete2 Totalizer Counter | ||||||
17 | 512 | 32-bit Integer | Port7 Discrete1 Count | ||||||
18 | 544 | 32-bit Integer | Port7 Discrete1 Duration | ||||||
19 | 576 | 32-bit Integer | Port7 Discrete1 Events Per Minute | ||||||
20 | 608 | 32-bit Integer | Port7 Discrete1 Totalizer Counter | ||||||
21 | 640 | 32-bit Integer | Port7 Discrete2 Count | ||||||
22 | 672 | 32-bit Integer | Port7 Discrete2 Duration | ||||||
23 | 704 | 32-bit Integer | Port7 Discrete2 Events Per Minute | ||||||
24 | 736 | 32-bit Integer | Port7 Discrete2 Totalizer Counter | ||||||
25 | 768 | 32-bit Integer | Port8 Discrete1 Count | ||||||
26 | 800 | 32-bit Integer | Port8 Discrete1 Duration | ||||||
27 | 832 | 32-bit Integer | Port8 Discrete1 Events Per Minute | ||||||
28 | 864 | 32-bit Integer | Port8 Discrete1 Totalizer Counter | ||||||
29 | 896 | 32-bit Integer | Port8 Discrete2 Count | ||||||
30 | 928 | 32-bit Integer | Port8 Discrete2 Duration | ||||||
31 | 960 | 32-bit Integer | Port8 Discrete2 Events Per Minute | ||||||
32 | 992 | 32-bit Integer | Port8 Discrete2 Totalizer Counter |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 1023 - 1016 | 1015 - 1008 | 1007 - 1000 | 999 - 992 | 991 - 984 | 983 - 976 | 975 - 968 | 967 - 960 |
subindex | 32 | 32 | 32 | 32 | 31 | 31 | 31 | 31 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 959 - 952 | 951 - 944 | 943 - 936 | 935 - 928 | 927 - 920 | 919 - 912 | 911 - 904 | 903 - 896 |
subindex | 30 | 30 | 30 | 30 | 29 | 29 | 29 | 29 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 895 - 888 | 887 - 880 | 879 - 872 | 871 - 864 | 863 - 856 | 855 - 848 | 847 - 840 | 839 - 832 |
subindex | 28 | 28 | 28 | 28 | 27 | 27 | 27 | 27 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |
bit offset | 831 - 824 | 823 - 816 | 815 - 808 | 807 - 800 | 799 - 792 | 791 - 784 | 783 - 776 | 775 - 768 |
subindex | 26 | 26 | 26 | 26 | 25 | 25 | 25 | 25 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 |
bit offset | 767 - 760 | 759 - 752 | 751 - 744 | 743 - 736 | 735 - 728 | 727 - 720 | 719 - 712 | 711 - 704 |
subindex | 24 | 24 | 24 | 24 | 23 | 23 | 23 | 23 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
bit offset | 703 - 696 | 695 - 688 | 687 - 680 | 679 - 672 | 671 - 664 | 663 - 656 | 655 - 648 | 647 - 640 |
subindex | 22 | 22 | 22 | 22 | 21 | 21 | 21 | 21 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 |
bit offset | 639 - 632 | 631 - 624 | 623 - 616 | 615 - 608 | 607 - 600 | 599 - 592 | 591 - 584 | 583 - 576 |
subindex | 20 | 20 | 20 | 20 | 19 | 19 | 19 | 19 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |
bit offset | 575 - 568 | 567 - 560 | 559 - 552 | 551 - 544 | 543 - 536 | 535 - 528 | 527 - 520 | 519 - 512 |
subindex | 18 | 18 | 18 | 18 | 17 | 17 | 17 | 17 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 |
bit offset | 511 - 504 | 503 - 496 | 495 - 488 | 487 - 480 | 479 - 472 | 471 - 464 | 463 - 456 | 455 - 448 |
subindex | 16 | 16 | 16 | 16 | 15 | 15 | 15 | 15 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 |
bit offset | 447 - 440 | 439 - 432 | 431 - 424 | 423 - 416 | 415 - 408 | 407 - 400 | 399 - 392 | 391 - 384 |
subindex | 14 | 14 | 14 | 14 | 13 | 13 | 13 | 13 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 |
bit offset | 383 - 376 | 375 - 368 | 367 - 360 | 359 - 352 | 351 - 344 | 343 - 336 | 335 - 328 | 327 - 320 |
subindex | 12 | 12 | 12 | 12 | 11 | 11 | 11 | 11 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 |
bit offset | 319 - 312 | 311 - 304 | 303 - 296 | 295 - 288 | 287 - 280 | 279 - 272 | 271 - 264 | 263 - 256 |
subindex | 10 | 10 | 10 | 10 | 9 | 9 | 9 | 9 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 96 | 97 | 98 | 99 | 100 | 101 | 102 | 103 |
bit offset | 255 - 248 | 247 - 240 | 239 - 232 | 231 - 224 | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 |
subindex | 8 | 8 | 8 | 8 | 7 | 7 | 7 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 104 | 105 | 106 | 107 | 108 | 109 | 110 | 111 |
bit offset | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 |
subindex | 6 | 6 | 6 | 6 | 5 | 5 | 5 | 5 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 |
bit offset | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 |
subindex | 4 | 4 | 4 | 4 | 3 | 3 | 3 | 3 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 |
bit offset | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | 2 | 2 | 2 | 2 | 1 | 1 | 1 | 1 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | Boolean | false = Do Not Reset, true = Reset | false | Port1 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
2 | 1 | Boolean | false = Do Not Reset, true = Reset | false | Port1 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
3 | 2 | Boolean | false = Do Not Reset, true = Reset | false | Port2 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
4 | 3 | Boolean | false = Do Not Reset, true = Reset | false | Port2 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
5 | 4 | Boolean | false = Do Not Reset, true = Reset | false | Port3 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
6 | 5 | Boolean | false = Do Not Reset, true = Reset | false | Port3 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
7 | 6 | Boolean | false = Do Not Reset, true = Reset | false | Port4 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
8 | 7 | Boolean | false = Do Not Reset, true = Reset | false | Port4 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
9 | 8 | Boolean | false = Do Not Reset, true = Reset | false | Port5 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
10 | 9 | Boolean | false = Do Not Reset, true = Reset | false | Port5 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
11 | 10 | Boolean | false = Do Not Reset, true = Reset | false | Port6 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
12 | 11 | Boolean | false = Do Not Reset, true = Reset | false | Port6 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
13 | 12 | Boolean | false = Do Not Reset, true = Reset | false | Port7 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
14 | 13 | Boolean | false = Do Not Reset, true = Reset | false | Port7 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
15 | 14 | Boolean | false = Do Not Reset, true = Reset | false | Port8 Discrete1 | If set to [Reset], Discrete1 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete1 Reset Count] | |||
16 | 15 | Boolean | false = Do Not Reset, true = Reset | false | Port8 Discrete2 | If set to [Reset], Discrete2 metrics will be reset. Note - the Count value can be set to a non-zero value using [Port# Discrete2 Reset Count] | |||
17 | 16 | 32-bit Integer | 0..2147483647 | 0 | Port1 Discrete1 Reset Count | ||||
18 | 48 | 32-bit Integer | 0..2147483647 | 0 | Port1 Discrete2 Reset Count | ||||
19 | 80 | 32-bit Integer | 0..2147483647 | 0 | Port2 Discrete1 Reset Count | ||||
20 | 112 | 32-bit Integer | 0..2147483647 | 0 | Port2 Discrete2 Reset Count | ||||
21 | 144 | 32-bit Integer | 0..2147483647 | 0 | Port3 Discrete1 Reset Count | ||||
22 | 176 | 32-bit Integer | 0..2147483647 | 0 | Port3 Discrete2 Reset Count | ||||
23 | 208 | 32-bit Integer | 0..2147483647 | 0 | Port4 Discrete1 Reset Count | ||||
24 | 240 | 32-bit Integer | 0..2147483647 | 0 | Port4 Discrete2 Reset Count | ||||
25 | 272 | 32-bit Integer | 0..2147483647 | 0 | Port5 Discrete1 Reset Count | ||||
26 | 304 | 32-bit Integer | 0..2147483647 | 0 | Port5 Discrete2 Reset Count | ||||
27 | 336 | 32-bit Integer | 0..2147483647 | 0 | Port6 Discrete1 Reset Count | ||||
28 | 368 | 32-bit Integer | 0..2147483647 | 0 | Port6 Discrete2 Reset Count | ||||
29 | 400 | 32-bit Integer | 0..2147483647 | 0 | Port7 Discrete1 Reset Count | ||||
30 | 432 | 32-bit Integer | 0..2147483647 | 0 | Port7 Discrete2 Reset Count | ||||
31 | 464 | 32-bit Integer | 0..2147483647 | 0 | Port8 Discrete1 Reset Count | ||||
32 | 496 | 32-bit Integer | 0..2147483647 | 0 | Port8 Discrete2 Reset Count |
bit offset | 527 | 526 | 525 | 524 | 523 | 522 | 521 | 520 |
subindex | 32 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 519 | 518 | 517 | 516 | 515 | 514 | 513 | 512 |
subindex | 32 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 511 | 510 | 509 | 508 | 507 | 506 | 505 | 504 |
subindex | 32 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 503 | 502 | 501 | 500 | 499 | 498 | 497 | 496 |
subindex | 32 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 495 | 494 | 493 | 492 | 491 | 490 | 489 | 488 |
subindex | 31 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 487 | 486 | 485 | 484 | 483 | 482 | 481 | 480 |
subindex | 31 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 479 | 478 | 477 | 476 | 475 | 474 | 473 | 472 |
subindex | 31 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 471 | 470 | 469 | 468 | 467 | 466 | 465 | 464 |
subindex | 31 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 463 | 462 | 461 | 460 | 459 | 458 | 457 | 456 |
subindex | 30 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 455 | 454 | 453 | 452 | 451 | 450 | 449 | 448 |
subindex | 30 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 447 | 446 | 445 | 444 | 443 | 442 | 441 | 440 |
subindex | 30 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 439 | 438 | 437 | 436 | 435 | 434 | 433 | 432 |
subindex | 30 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 431 | 430 | 429 | 428 | 427 | 426 | 425 | 424 |
subindex | 29 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 423 | 422 | 421 | 420 | 419 | 418 | 417 | 416 |
subindex | 29 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 415 | 414 | 413 | 412 | 411 | 410 | 409 | 408 |
subindex | 29 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 407 | 406 | 405 | 404 | 403 | 402 | 401 | 400 |
subindex | 29 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 399 | 398 | 397 | 396 | 395 | 394 | 393 | 392 |
subindex | 28 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 391 | 390 | 389 | 388 | 387 | 386 | 385 | 384 |
subindex | 28 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 383 | 382 | 381 | 380 | 379 | 378 | 377 | 376 |
subindex | 28 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 375 | 374 | 373 | 372 | 371 | 370 | 369 | 368 |
subindex | 28 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 367 | 366 | 365 | 364 | 363 | 362 | 361 | 360 |
subindex | 27 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 359 | 358 | 357 | 356 | 355 | 354 | 353 | 352 |
subindex | 27 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 351 | 350 | 349 | 348 | 347 | 346 | 345 | 344 |
subindex | 27 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 343 | 342 | 341 | 340 | 339 | 338 | 337 | 336 |
subindex | 27 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 335 | 334 | 333 | 332 | 331 | 330 | 329 | 328 |
subindex | 26 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 327 | 326 | 325 | 324 | 323 | 322 | 321 | 320 |
subindex | 26 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 319 | 318 | 317 | 316 | 315 | 314 | 313 | 312 |
subindex | 26 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 311 | 310 | 309 | 308 | 307 | 306 | 305 | 304 |
subindex | 26 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 303 | 302 | 301 | 300 | 299 | 298 | 297 | 296 |
subindex | 25 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 295 | 294 | 293 | 292 | 291 | 290 | 289 | 288 |
subindex | 25 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 287 | 286 | 285 | 284 | 283 | 282 | 281 | 280 |
subindex | 25 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 279 | 278 | 277 | 276 | 275 | 274 | 273 | 272 |
subindex | 25 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 271 | 270 | 269 | 268 | 267 | 266 | 265 | 264 |
subindex | 24 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 263 | 262 | 261 | 260 | 259 | 258 | 257 | 256 |
subindex | 24 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 255 | 254 | 253 | 252 | 251 | 250 | 249 | 248 |
subindex | 24 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 247 | 246 | 245 | 244 | 243 | 242 | 241 | 240 |
subindex | 24 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 239 | 238 | 237 | 236 | 235 | 234 | 233 | 232 |
subindex | 23 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 231 | 230 | 229 | 228 | 227 | 226 | 225 | 224 |
subindex | 23 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 223 | 222 | 221 | 220 | 219 | 218 | 217 | 216 |
subindex | 23 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 215 | 214 | 213 | 212 | 211 | 210 | 209 | 208 |
subindex | 23 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 207 | 206 | 205 | 204 | 203 | 202 | 201 | 200 |
subindex | 22 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 199 | 198 | 197 | 196 | 195 | 194 | 193 | 192 |
subindex | 22 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 191 | 190 | 189 | 188 | 187 | 186 | 185 | 184 |
subindex | 22 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 183 | 182 | 181 | 180 | 179 | 178 | 177 | 176 |
subindex | 22 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 175 | 174 | 173 | 172 | 171 | 170 | 169 | 168 |
subindex | 21 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 167 | 166 | 165 | 164 | 163 | 162 | 161 | 160 |
subindex | 21 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 159 | 158 | 157 | 156 | 155 | 154 | 153 | 152 |
subindex | 21 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 151 | 150 | 149 | 148 | 147 | 146 | 145 | 144 |
subindex | 21 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 143 | 142 | 141 | 140 | 139 | 138 | 137 | 136 |
subindex | 20 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 135 | 134 | 133 | 132 | 131 | 130 | 129 | 128 |
subindex | 20 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 127 | 126 | 125 | 124 | 123 | 122 | 121 | 120 |
subindex | 20 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 119 | 118 | 117 | 116 | 115 | 114 | 113 | 112 |
subindex | 20 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 111 | 110 | 109 | 108 | 107 | 106 | 105 | 104 |
subindex | 19 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 103 | 102 | 101 | 100 | 99 | 98 | 97 | 96 |
subindex | 19 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 95 | 94 | 93 | 92 | 91 | 90 | 89 | 88 |
subindex | 19 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 87 | 86 | 85 | 84 | 83 | 82 | 81 | 80 |
subindex | 19 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 79 | 78 | 77 | 76 | 75 | 74 | 73 | 72 |
subindex | 18 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 71 | 70 | 69 | 68 | 67 | 66 | 65 | 64 |
subindex | 18 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 |
subindex | 18 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 |
subindex | 18 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 |
subindex | 17 | |||||||
element bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
bit offset | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
subindex | 17 | |||||||
element bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
bit offset | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
subindex | 17 | |||||||
element bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
bit offset | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
subindex | 17 | |||||||
element bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
bit offset | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
subindex | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
bit offset | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
subindex | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete1 IO Selection | ||||
2 | 8 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete1 Delay Mode | Discrete1 Delay Mode Selection | |||
3 | 16 | 32-bit Integer | 0 | Discrete1 Delay Timer 1 | Discrete1 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
4 | 48 | 32-bit Integer | 0 | Discrete1 Delay Timer 2 | Discrete1 Off Delay or Totalizer time. | ||||
5 | 80 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete1 Mirroring Enable | ||||
6 | 88 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete1 Mirroring Port Selection | ||||
7 | 96 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete1 Mirroring Channel Selection | ||||
8 | 104 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete1 Mirroring Inversion | ||||
9 | 112 | 8-bit UInteger | 1 = PNP Input, 3 = PNP Output with Pull Down | 3 | Discrete2 IO Selection | ||||
10 | 120 | 8-bit UInteger | 0 = Disabled, 1 = On Off Delay, 2 = On One-shot, 3 = Off One-shot, 4 = On Pulse-stretcher, 5 = Off Pulse-stretcher, 6 = Totalizer, 7 = Retriggerable On One-shot, 8 = Retriggerable Off One-shot | 0 | Discrete2 Delay Mode | Discrete2 Delay Mode Selection | |||
11 | 128 | 32-bit Integer | 0 | Discrete2 Delay Timer 1 | Discrete2 On Delay, One-shot, Pulse-stretcher time or Totalizer Count | ||||
12 | 160 | 32-bit Integer | 0 | Discrete2 Delay Timer 2 | Discrete2 Off Delay or Totalizer time | ||||
13 | 192 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Discrete2 Mirroring Enable | ||||
14 | 200 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Discrete2 Mirroring Port Selection | ||||
15 | 208 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Discrete2 Mirroring Channel Selection | ||||
16 | 216 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Discrete2 Mirroring Inversion |
octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
bit offset | 223 - 216 | 215 - 208 | 207 - 200 | 199 - 192 | 191 - 184 | 183 - 176 | 175 - 168 | 167 - 160 |
subindex | 16 | 15 | 14 | 13 | 12 | 12 | 12 | 12 |
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 |
octet | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
bit offset | 159 - 152 | 151 - 144 | 143 - 136 | 135 - 128 | 127 - 120 | 119 - 112 | 111 - 104 | 103 - 96 |
subindex | 11 | 11 | 11 | 11 | 10 | 9 | 8 | 7 |
element bit | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
octet | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
bit offset | 95 - 88 | 87 - 80 | 79 - 72 | 71 - 64 | 63 - 56 | 55 - 48 | 47 - 40 | 39 - 32 |
subindex | 6 | 5 | 4 | 4 | 4 | 4 | 3 | 3 |
element bit | 7 - 0 | 7 - 0 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | 31 - 24 | 23 - 16 |
octet | 24 | 25 | 26 | 27 | ||||
bit offset | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||||
subindex | 3 | 3 | 2 | 1 | ||||
element bit | 15 - 8 | 7 - 0 | 7 - 0 | 7 - 0 |
subindex | bit offset | data type | allowed values | default value | acc. restr. | mod. other var. | excl. from DS | name | description |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 8-bit UInteger | 0 = Disabled, 1 = Enabled | 0 | Mirroring Enable | ||||
2 | 8 | 8-bit UInteger | 0 = Port1, 1 = Port2, 2 = Port3, 3 = Port4, 4 = Port5, 5 = Port6, 6 = Port7, 7 = Port8 | 0 | Mirroring Port Selection | ||||
3 | 16 | 8-bit UInteger | 0 = Discrete1, 1 = Discrete2 | 0 | Mirroring Channel Selection | ||||
4 | 24 | 8-bit UInteger | 0 = Not Inverted, 1 = Inverted | 0 | Mirroring Inversion | ||||
5 | 32 | 8-bit UInteger | 0 = NPN Output, 1 = PNP Output | 1 | Mirroring Polarity | ||||
6 | 40 | 8-bit UInteger | 0 = Output Open Collector, 1 = Output Push Pull | 0 | Mirroring Output Type |
octet | 0 | 1 | 2 | 3 | 4 | 5 | ||
bit offset | 47 - 40 | 39 - 32 | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | ||
subindex | 6 | 5 | 4 | 3 | 2 | 1 | ||
element bit | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 | 7 - 0 |
Code | Type | Name | Description |
---|---|---|---|
25376 (0x6320) | Error | Parameter error | Check datasheet and values |
36000 (0x8ca0) | Warning | All-time Run Time Event | Event indicating the corresponding configured running time has elapsed. |
36001 (0x8ca1) | Warning | Resetable Run Time Event | Event indicating the corresponding configured running time has elapsed. |
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Note: This page shows the content of an IODD file transformed into HTML format. In the case of disparity between this and the XML view, the content of the XML file takes precedence.
Created by IODD Viewer V1.4.